About Event

🚀 ChipCraft 2.0 – 24hr VLSI Design Hackathon 🚀

📅 13–14 March 2026 | 🏛️ DSPSD Lab 321, Kalasalingam University, Krishnankoil
🎯 *Theme: RTL to Synthesis + Formal Verification

Challenge:
Given a real‑world problem statement, design an optimized RTL solution, synthesize to netlist, and verify using formal methods—all within 24 hours!

What you'll do:
- RTL coding (Verilog/SystemVerilog)
- Logic synthesis with Synopsys Design Compiler
- Formal verification with Synopsys VC Formal
- Generate timing/area reports and present your chip

Powered by: Synopsys Chips to Startup (C2S) Program + KARE IEEE EDS/SSCS

Team: 2–3 members
Fee: ₹300/person
Prizes: ₹25,000 pool (₹15k/₹7k/₹3k)
Register: [euphoria.kalasalingam.ac.in/register](https://euphoria.kalasalingam.ac.in)

Who should join: ECE/EEE/CSE students with basic Verilog + Linux skills. Some prior Synopsys experience required—training provided!

Why ChipCraft? Hands‑on industry VLSI flow = direct path to semiconductor jobs (RTL/DFT/PD roles).

#VLSI #ChipDesign #Hackathon #Synopsys #IEEEEDS

Event Caption

24hr VLSI Hackathon: RTL → Synthesis → Formal Verification

Event Theme

VLSI Chip Design

Departments:

CSE AIDS ECE IT EEE Instrumentation Civil Industrial Telecommunication Mechanics Aeronautical Aerospace Design

Contact Details

Mr. Avulapati Giridhar
Chair KARE IEEE EDS
+919989455935

Mr. Dinesh Ramineni
secretary, KARE IEEE EDS
+917569532047

Certificates will be provided to Participants

Related Links:

ChipCraft 2.0 Kalasalingam Academy of Research and Education Virudhunagar Tamil Nadu March 2026 Technical Fests Technical Fests in Virudhunagar 2026 Technical Fests in Tamil Nadu Hackathons Hackathons in Virudhunagar 2026 Hackathons in Tamil Nadu