About Event

Opportunities in VLSI Industries & Hardware modeling using Verilog HDL & hands- on training in CAD tools.

The workshop will cover the following topics:
Combinational circuits design.
Sequential circuits design.
Synchronous circuits design.
Memories design.
FSM design.
Hardware verificationusing latest FPGA device.
Testbenches.
Design for test.

Workshops

Opportunities in VLSI Industries & Hardware modeling using Verilog HDL & hands- on training in CAD tools.

Event Guests

Mr.ananthraj,
Sr.ASIC verification engineer,
R&D department,
Sandisk,
Bangalore.

Departments:

CSE ECE EEE BioMedical Design

Accommodation

100/- per day

How to reach K Ramakrishnan College of Engineering, Trichy

Trichy central-samayapuram toll plaza(chennai or velore bus)
or
chatram-samayapuram toll plaza(perambalur bus)

Related Links:

ASIC design workshop 2018 K Ramakrishnan College of Engineering Trichy Tamil Nadu September 2018 Workshops Workshops in Tamil Nadu Workshops in Trichy