Two days Online Technical Seminar on Recent Advancements in VLSI Signal Processing 2021

This Technical Seminar will immensely help the faculty members, researchers and PG Students to broad base their knowledge on VLSI Design, Synthesis, and implementation which would enable them to pursue an effective research career. Please find the details of the above programme in the enclosed brochure.

We request you to sponsor faculty members from ECE/CSE/IT/EEE/ EIE/BME or any allied departments of your esteemed organization for this Technical Seminar. We shall be glad to receive the registration in the Registration Link: https://forms.gle/b1zi382Rg28utNzL8 on or before 14.09.2021.

Static Timing Analysis.
* CAM and DCAM Architecture implementation in FPGA.
* High level synthesis for FPGA.
* VLSI Design of Advanced Digital filters.
* Modular architectures for resilience against power analysis attack.
* Partial Reconfiguration on FPGAs.
* Trend and challenges on SOC design.
* Wave pipelining.
VLSI Implementation of Cryptographic Algorithms
for Security and Privacy in Communication Networks

14.09.2021

Nil

Mepco Schlenk Engineering College Mepco Nagar, Mepco Engineering College Post-626005 Sivakasi, Tamilnadu, India