Two-day workshop on CADENCE EDA Tools for SoC Chip design 2022

Name: Two-day workshop on CADENCE EDA Tools for SoC Chip design 2022
Start: 2022-09-22T00:00:00+05:30
End: 2022-09-23T23:59:59+05:30
Location: Sri Eshwar College of Engineering

Hosted by Sri Eshwar College of Engineering

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Event link

Date22 Sep 202212:00 AM IST

LocationCoimbatoreOffline

EntryPaidExternal registration

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About the event

Two-day workshop on
“CADENCE EDA Tools for SoC Chip design”
22nd & 23rd September 2022

Workshop objectives:

The aim of this workshop is to provide hands-on experience on the state-of-the-art Cadence EDA tools for VLSI Design. The participants will have an exposure to the Circuit Design & Simulation, Layout, Physical Verification (DRC, LVS), and Extraction. The workshop includes practice sessions on the Cadence design and simulation tools.

Events & highlights

Workshop Topics:
• Introduction to Cadence and its various tools.
• Basics of mixed signal design using Cadence Virtuoso.
• Introduction to Physical Verification, DRC/LVS by Assura.
• Implementation of NC Launch and RTL Compiler for Digital Circuit using Verilog.
• Extraction of RC Components and Generation of GDSII file.

Meet the organizer

Sri Eshwar Engineering College, was formally inaugurated in 2008. Team of three young, aspiring visionaries laid the foundation stones of the college with the vision and enthusiasm to bring the highest quality of education to students to produce world class engineers. Since that day, Sri Eshwarâ€™s journey has been filled with achievements and major milestones!

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