
One-week Hybrid Mode - National level Workshop on “Explore the Recent EDA Tools and Methodologies for Efficient VLSI Circuit Design” 2024
Hosted by S. A. Engineering College
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About the event
In the fast-evolving landscape of VLSI circuit design, the integration of advanced Electronic Design Automation (EDA) tools and methodologies has become paramount to achieving optimal performance, reliability, and efficiency. This exploration focuses on the latest trends shaping the field, offering insights into the cutting-edge tools and methodologies that drive innovation in Very Large Scale Integration (VLSI) design. Exploring recent Electronic Design Automation (EDA) tools and methodologies is crucial for staying abreast of advancements in VLSI (Very Large Scale Integration) circuit design. EDA tools play a vital role in automating various stages of the design process, enhancing productivity, and ensuring the reliability of complex integrated circuits. This exploration underscores the pivotal role of EDA tools and methodologies in shaping the VLSI design landscape. The continuous integration of advanced tools and methodologies not only enhances productivity but also addresses the challenges posed by increasing design complexity. Staying informed and adopting these innovations is crucial for designers and engineers striving to push the boundaries of VLSI circuit design in the new era.
Events & highlights
Micro to Nano-A Journey of Inspiring Creations(ICs)
Recent trends in VLSI Design
Full Custom IC design Flow of Digital Circuit-Cadence
Introduction to FPGA Architecture
Evolutionary algorithm for FPGA placement Routing
Physical Design Flow
Full Custom IC design Flow of Analog Circuit-Cadence
Device Modeling
Digital ASIC Design Flow
Basic experience with Xilinix vivado Design software suite
System on Chip Design
Green VLSI: Energy-Efficient and Environmentally Friendly Designs
Digital Applications- Xilinx Vivado
Digital ASIC Design Flow
VLSI Testing and Validation
Exploring the PYNQ Frame work
Demo of Python Productivity on PYNQ-Z2 Board
Meet the organizer
Towards fulfilling the above objectives, the Dharma Naidu Educational & Charitable Trust established the S.A. Engineering College in the year 1998 – ’99 in accordance with the general policy of the Govt. of TamilNadu to give high priority to Technical Education. The campus is spread over a vast area of about 42 acres and has 2.25 lakh sq.ft. of constructed area which includes class rooms, drawing halls, laboratories, workshops and associated facilities. In recognition of the quality system of high caliber being implemented for the administration of the institution and achievement of its goals, m/s. TUV NORD have recorded ISO 9001: 2008 certification. The institution has NBA Accredited Departments and NAAC “A†Grade certification.
Explore S. A. Engineering College ↗Event type details
Workshop
Workshops
In the fast-evolving landscape of VLSI circuit design, the integration of advanced Electronic Design Automation (EDA) tools and methodologies has become paramount to achieving optimal performance, reliability, and efficiency. This exploration focuses on the latest trends shaping the field, offering insights into the cutting-edge tools and methodologies that drive innovation in Very Large Scale Integration (VLSI) design. Exploring recent Electronic Design Automation (EDA) tools and methodologies is crucial for staying abreast of advancements in VLSI (Very Large Scale Integration) circuit design. EDA tools play a vital role in automating various stages of the design process, enhancing productivity, and ensuring the reliability of complex integrated circuits. This exploration underscores the pivotal role of EDA tools and methodologies in shaping the VLSI design landscape. The continuous integration of advanced tools and methodologies not only enhances productivity but also addresses the challenges posed by increasing design complexity. Staying informed and adopting these innovations is crucial for designers and engineers striving to push the boundaries of VLSI circuit design in the new era.
Registration deadline / Important dates
Submission of filled in application : April 4th 2024
Intimation of Selection : April 9th 2024
Confirmation of participants via E-mail : April 11th 2024
How to Reach
Poonamallee-Avadi Road, Thiruverkadu, Chennai - 600 077. Tamilnadu. INDIA.
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