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National Level Seminar on Research Focus on analog and Mixed Signal ASIC Design

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Date31 Jan 201712:00 AM IST
LocationTiruchirappalliOffline
EntryPaidExternal registration
National Level Seminar on Research Focus on analog and Mixed Signal ASIC Design

About the event

The programme is designed to provide a brief introduction to recent trends in Analog and Digital VLSI Design, ASIC Design Issues, RF transmitter and receiver. It also provides an overview of design issues in Smart city development and Environmental changes in India. ASIC research focuses on rural development through IoT Communication, Hardware Oriented and Secure Data Storage Platform, 3D and Video Super-resolution and SoC Design Services. This Seminar will make the participants learn the ASIC Design using CADENCE much easier with practical approach. It provides a platform for faculty, research scholars and P.G. students to enhance the basic knowledge and enriched teaching methodology in the area of ASIC Design and its applications.

Events & highlights

COURSE CONTENTS
1. Introduction o ASIC Design.
2. Mixed Signal ASIC Design.
3. Low power Transceiver ASIC or future SATCOM
4. Design and development of RF transceiver ASIC
5. ASIC in Space Applications.

Meet the organizer

Explore Kongunadu College of Engineering and Technology ↗

Event type details

Seminar

Registration deadline / Important dates

IMPORTANT DATES
Last date for registration : 27.01.2017
Intimation of selection : 28.01.2017

Registration Fees

REGISTRATION FEE
Academicians, Research scholars: Rs.250/-
UG/PG Students : Rs.200/

How to Reach

Kongunadu College of Engineering and Technology is located at Thottiam around 54 KM away from Trichy and 27 KM from Namakkal. Participants can avail the college bus for transportation.

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