Low Power VLSI Design using Tanner EDA 2021

The purpose of this workshop is to help learn Low power VLSI using Tanner EDA Tools.
Here’s what you’ll learn by hands-on session

asics of MOS Circuits
MOS Transistor structure and device modelling,
MOS Inverters, MOS Combinational Circuits
Different Logic Families
Sources of Power Dissipation
Dynamic Power Dissipation: Short Circuit Power,
Switching Power, Glitching Power
Supply Voltage Scaling Approach
Clock Gating Techniques

Arasu Engineering College, Chennai Main Road, Kumbakonam â 612501 Thanjavur Dist., Tamilnadu, INDIA