Faculty Development Program on IC design flow and VLSI testing using Mentor Graphics EDA tools

We are organizing the two days Faculty development program on "IC design flow & VLSI testing using Mentor Graphics EDA tools". This program will be really useful for the people those who work in the VLSI area and want to know the advanced EDA tool.

Faculty Development program
- Fundamentals VLSI chip design methodology
- Concepts of ASIC full custom & semi custom methodologies
- RTL to GDSII using semi custom design flow
- Concepts of analog digital mixed design and verfication
- Hands-on-session

Experts from CoreEL technologies, Bangalore

Apply on or before 23rd March 2018

Rs.500

Kanchipuram bus stop -> pookadai -> sankara university(SCSVMV)

Accommodation will be arranged accordingly