
3600 Development Through Motivation, Research and innovation in Microelectronics and VLSI 2025
MEET YOUR MOMENT.
About the event
Events & highlights
"Neetha Maria Celin, Scientist E
Hardware Design Group
CDAC Trivamdrum" Towards AatmaNirbhar Bharat with DIR-V VEGA: A Vision in VLSI Innovation
Demo and Hands-on Session: VEGA Processors and Ecosystem
"Mydhily MR, Project Engineer, Hardware Design Group
CDAC Trivamdrum" Sensor interfacing with ARIES development boards
Dr.Sreeja, Associate Professor, Anna University Semiconductor fabrication techniques
Dr. Vijaya Kumar Hardware Security Protocol for Resource Constrained Devices
Dr. Jeni Anto, Managing Director, Dewdas Technology pvt ltd, Bengaluru Electronic system design soc/sip approach
Dr. Jeni Anto, Managing Director, Dewdas Technology pvt ltd, Bengaluru RF/Wireless design with integrated antenna
Dr. Arjun Menon, Co-founder and Chief Engineer of InCore Semiconductors Building Core-Generators for RISC-V
Dr. Meganathan, Professor, Anna University Recent trends in IC design
"Mr, Mohith, R&D Engineer Senior, HITACHI
Mr. Tharun, Senior physical design engineer, HITACHI" Industry standards in VLSI design
Mr. R.N. Ramesh Emulation v/s Simulation - A Practical Guide
Meet the organizer
Explore SRM Institute of Science and Technology Kattankulathur Campus ↗Event type details
Training Program
Workshops
"Neetha Maria Celin, Scientist E
Hardware Design Group
CDAC Trivamdrum" Towards AatmaNirbhar Bharat with DIR-V VEGA: A Vision in VLSI Innovation
Demo and Hands-on Session: VEGA Processors and Ecosystem
"Mydhily MR, Project Engineer, Hardware Design Group
CDAC Trivamdrum" Sensor interfacing with ARIES development boards
Dr.Sreeja, Associate Professor, Anna University Semiconductor fabrication techniques
Dr. Vijaya Kumar Hardware Security Protocol for Resource Constrained Devices
Dr. Jeni Anto, Managing Director, Dewdas Technology pvt ltd, Bengaluru Electronic system design soc/sip approach
Dr. Jeni Anto, Managing Director, Dewdas Technology pvt ltd, Bengaluru RF/Wireless design with integrated antenna
Dr. Arjun Menon, Co-founder and Chief Engineer of InCore Semiconductors Building Core-Generators for RISC-V
Dr. Meganathan, Professor, Anna University Recent trends in IC design
"Mr, Mohith, R&D Engineer Senior, HITACHI
Mr. Tharun, Senior physical design engineer, HITACHI" Industry standards in VLSI design
Mr. R.N. Ramesh Emulation v/s Simulation - A Practical Guide
Registration Fees
Rs. 1150 for Faculty/ Industry/ academi
How to Reach
SRM University, Kattankulathur
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