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UID:eventsphere-59711@www.knowafest.com
DTSTAMP:20261008T183343Z
DTSTART:20230305T183000Z
DTEND:20230306T182959Z
SUMMARY:National Level Workshop on Advanced Verification using System Veril
 og in Questasim 2023
LOCATION:Karpagam College of Engineering\, Coimbatore
DESCRIPTION:<p>System Verilog is the industry IEEE-1800 standard combining 
 the hardware description language and hardware verification language. This
  course focuses on the use of advanced verification features in System Ver
 ilog. Students will learn the step-by-step processes of creating flexible 
 verification components\, which form the basis of modern industry-standard
  methodologies<br />\nPREREQUISITE<br />\nKnowledge in System Verilog and 
 knowledge of<br />\nVHDL\, Verilog\, C/C++\, and some hardware verificatio
 n experience.<br />\nKEY CONTENTS OF THE SEMINAR<br />\n1. Introduction to
  Design and Verification of an IC<br />\n2. Introduction to System Verilog
  language<br />\n3. Interfaces\, Clocking blocks\, Modports<br />\n4. Cons
 traint based Randomization<br />\n5. Coverage Metrics in verification<br /
 >\n6. Assertions based verification<br />\nNote: 3\,4\,5\,6 - Will be pure
  hands-on Experience</p>
URL:https://www.knowafest.com/national-level-workshop-on-advanced-verificat
 ion-using-system-verilog-in-questasim-2023
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