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UID:eventsphere-66349@www.knowafest.com
DTSTAMP:20261008T123423Z
DTSTART:20260924T183000Z
DTEND:20260926T182959Z
SUMMARY:Chipcraft 3.0
LOCATION:Kalasalingam Academy of Research and Education\, Virudhunagar
DESCRIPTION:<p>CHIPCRAFT 3.0 - 24-Hour VLSI Hackathon<br />\n<br />\nEvent 
 Overview<br />\n<br />\nChipCraft 3.0 is a 24-hour VLSI Hackathon organize
 d to provide students with hands-on exposure to the complete digital chip 
 design flow. Participants will design\, synthesize\, and verify digital ci
 rcuits using industry-standard Synopsys C2S tools. The event provides an o
 pportunity for students to apply their knowledge of Verilog\, Linux\, RTL 
 Design\, Synthesis\, and Formal Verification in a competitive and collabor
 ative environment.<br />\n<br />\nEvent Details<br />\n<br />\nDates: 25th
 –26th September 2026<br />\n<br />\nVenue: DSPSD Lab\, 3rd Block\, KARE<
 br />\n<br />\nDuration: 24 Hours<br />\n<br />\nTeam Size: 2–3 Students
 <br />\n<br />\n<br />\n<br />\nDesign Flow<br />\n<br />\nParticipants wi
 ll work through the complete VLSI design flow:<br />\n<br />\nRTL → Gate
 -Level Netlist Generation → Formal Verification<br />\n<br />\nTeams wil
 l design and implement digital circuits while gaining practical experience
  with professional Synopsys EDA tools.<br />\n<br />\n<strong>Prize Struct
 ure</strong></p>\n\n<ul>\n	<li>1st Prize: ₹12\,000 + Gold Certificate</l
 i>\n	<li>2nd Prize: ₹8\,000 + Silver Certificate</li>\n	<li>3rd Prize: 
 ₹5\,000 + Bronze Certificate</li>\n</ul>\n\n<p><strong>Total Prize Pool:
 </strong> ₹25\,000<br />\n<br />\nCertificates will be provided to all p
 articipants.<br />\n<br />\n<br />\n<strong>Eligibility</strong><br />\n<b
 r />\nOpen to current ECE / EEE / CSE college students<br />\n<br />\nMaxi
 mum 3 members per team<br />\n<br />\nBasic knowledge of Verilog and Linux
  is required<br />\n<br />\n<br />\n<strong>Technical Requirements</strong
 ></p>\n\n<ul>\n	<li>Participants should have basic knowledge of:</li>\n	<l
 i>Verilog HDL</li>\n	<li>Linux Environment</li>\n	<li>Digital Electronics<
 /li>\n	<li>RTL Design</li>\n	<li>Logic Synthesis</li>\n	<li>Formal Verific
 ation</li>\n	<li>Synopsys EDA Tools</li>\n</ul>\n\n<p><br />\n<br />\n<br 
 />\n<strong>Rules</strong></p>\n\n<ul>\n	<li>Registration is valid only th
 rough the official registration portal.</li>\n	<li>Participants will be co
 nsidered registered only after completing the official registration proces
 s.</li>\n	<li>No plagiarism or copying from the internet.</li>\n	<li>All t
 eam members are expected to contribute equally.</li>\n	<li>Participants mu
 st respect judges\, organizers\, and fellow participants.</li>\n</ul>\n\n<
 p><br />\n<br />\nRegistration Details<br />\n<br />\nRegistration Fee: 
 ₹300 per person<br />\n<br />\nRegistration Portal:<br />\n<br />\n<a hr
 ef="https://euphoria.kalasalingam.ac.in/">https://euphoria.kalasalingam.ac
 .in/</a><br />\n<br />\nCHIPCRAFT 3.0<br />\n<br />\nFrom RTL to Gate-Leve
 l Netlist Generation — Build. Synthesize. Verify.</p>
URL:https://www.knowafest.com/chipcraft-30
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